Loginway

This is very simple step-by-step tutorial how to start with the Xilinx EDK. In this example I have used the Webpack edition 10.1 of the EDK and Digilent Spartan-3 Starter Board.

The example is very simple and uses software test applications generated by the tool.

1. Launch the EDK and use the Base System Builder (BSB) wizzard to create a new project.

2. You need to select new project folder. The file has to be named system.xmp.

3. Select an option to create new design.

4. It is very convenient option in the EDK if you are using one of the Xilinx boards. Otherwise you need to specify your own peripherals. I am using Spartan-3 Starter Board in version E. The tool knows all peripherals available on the board and it simplifies the whole process.

5. I am using MicroBlaze processor. It is the only option for Spartan-3 devices.

6. The board has 50MHz clock so this is the frequency used for the processor clock. Other options are left as default – hardware debug module and the amount of Block RAM.

7. You can include or not specific IP blocks for your design. It uses RS232 for serial communication with the PC with 9600 bps speed, 8 bits and no parity. The board has also 8 LEDs, 4 sections of the 7-segmant LED display and several push-buttons.

8. This settings are left as default.

9. If you want to use any custom peripheral they can be added here.

10. In am using RS232 as the Standard In/Out device. It can be the JTAG UART block if the mdm IP is used or disabled. Select the two test applications to be created to test the system.

11. Here you can select memory options for the memory test.

12. Here you can select memory device options.

13. See the summary and generate the system.

14. Click finish.

15. This is system assembly view. The system has two separate data and instruction LMB buses and a peripheral PLB bus.

16. Download bitstream to the board. The tool will run through the synthesis, placement and routing. It will also invoke the IMPACT to tool to download the bitstream to the FPGA.

17. Successful summary should be similar to this.

18. Althogh it is possible to initialise Block RAMs (BRAMs) to contain a built application, but it is not good solution as usually there is not enough BRAM space. It is better to keep the executable file in external memory. Click on Build Project.

19. Click on XMD Debug Option in the debug panel and make sure options like below are selected.

20. Launch the XMD.

21. Download the TestApp_Peripheral application by writing command:

dow TestApp_Peripheral/executable.elf

22. Run the application by writing command:

run

23. Launch the HyperTerminal or similar program and choose port settings.

The TestApp_Peripheral application tests LEDs and sends some debug information through the RS232 port. It should look like this.

I find it often difficult and time consuming to learn a new tool. I have spent quite a lot of time with Xilinx toolset and this short tutorial might help somebody starting with XIlinx tools. It basically shows how to create a simple project from scratch. I am using the Webpack edition of the ISE 10.1, ISim simulator and Digilent Spartan-3 board.

The example I want to show is quite trivial. It has an AND gate functionality (the output is ‘high’ only when both inputs are ‘high’), plus clock and reset signals. The output is registered and the reset signal is active high. I have used Verilog language to capture design and create testbench.

1. Launch the ISE and click on File -> New Project. Add a project name and choose its location. Choose the HDL type of project.

2. As the project will be implemented on the Digilent Spartan-3 board I have selected the xc3s200 device with ft256 package and -4 speed.

3. Do not add any source and click on ‘next’ button.

4. Do not add any existing sources and click ‘next’.

5. Click on ‘finish’ on the summary window.

6. Click on Project -> New Source to add a source file to the project. Choose the Verilog module and select ‘Add to project’ option.

7. The example has four inputs and one output.

8. Click on ‘finish’ button.

9. The template source file should open and a few lines of code should be added.

10. In the sources panel, click on ‘Sources for:’ option and change it to ‘Behavioural Simulation’.

Click on Project -> New source and select Verilog Test Fixture to create testbench. Select ‘Add to project’ option.

11. Click on ‘next’.

12. Click on ‘finish’.

13. A few lines of code should be added to the created template to provide clock several test conditions.

14. In the ‘processes’ pannel expand ‘Xilinx ISE Simulator’ and double click on ‘Simulate behavioural model’.

As shown on the picture above, the project has an AND gate functionality and behaves as expected, and now it can be implemented into an FPGA on the Digilent Spartan-3 board.

15. To implement a project in the ‘Sources’ panel, the ‘Sources for:’ option should to be changed to ‘Implementation’. Click on Project -> New source and select Implementation Constraints File (.ucf). Give it a name and add to project.

16. Click on ‘finish’.

17. Select the .ucf file and double click on ‘Edit constraints’.

18. As I want to implement the design on the Digilent S3 board, it is necessary to tell the tool which FPGA’s pins should be used for which project’s I/Os. From the boards documentation http://www.digilentinc.com/Data/Products/S3BOARD/S3BOARD_RM.pdf I know that the pins K13 and K14 are connected to slide switches, whereas the P13 pin is connected to the LED. The T19 pin is a clock input and the L14 is a push-button (high when pressed). The .ucf file format is quite simple to edit manually, and it would be quite useful later when using EDK.

19. Save the file and double click on ‘Configure Target Device’ on the ‘processes’ window. As the iMPACT tool is used to configure device the wizard window would pop up.

20. Select JTAG and automatic connection.

21. The iMPACt tool has detected two devices on the boundary scan chain. There is a Spartan-3 device and platform flash on the board. Select the appropriate .bit file to program xc3s200 device.

22. Bypass the second device from the JTAG chain.

23. Leave the default options on the following window.

24. Set the jumpers on the J8 connector on the board to M1 mode and remove jumper from the JP1connector.

25. Right click on the xc3s200 device and click on ‘Program’ button.

26. You should be able to see the ‘Program Succeeded’ message.

27. Now the project can be tested on the board. The slide switches are connected to the inputs A and B. The Z output is connected to the LED, while the push-button is connected to the ‘reset’ input.

Mixed-signal PSoC microcontroller from Cypress have been for quite a long time on market. Two main development environments for these chips were PSoC Designer – for assembly and C programming – and PSoC Express – the visual environment. With the newest PSoC Desiger 5 release the two design environments are available as one package with uniformed GUI.

The drawback of the previous releases of the tools was the lack of free C compiler. It has changed in the newest release, and the Hi-Tech C compiler is now available with the PSoC Designer 5. It has no limitations except reduced code optimisation. Full Hi-Tech Pro version of the compiler is available to use for 45 days free of charge.

Microchip started the PIC32 design challenge 2008. Contestants have to use new PIC32 development board available from DigiKey for $49.99. The overall value of prizes exceeds $200,000. Microchip also started new website where all design contest details can be found, together with rules, prizes list, forum etc. The PIC-32 Design Challenge website also contains PIC32 course videos.

The design challenge is divided into four phases:

• paper – only abstract and block diagram explaining concept of the design are judged and let to the next phase
• hardware – hardware prototype, BOM and schematics are submited
• software
• final prototype

The designs’ progress and submitted ideas can be traced and voted for at the website.

New online course is available on the Techonline website. The Introduction to ARM course describes ARM cores and architectures. At the moment course contains modules:

• ARM Core family
• Company profile
• ARM architecture fundamentals
• AMBA
• ARM Core families and roadmap
• ARM Development systems
• Complete partnerships

The whole course takes about 2.5 hours to complete.

Esperan, company providing training for electonic engineers, has released a SystemC Live CD. SC Live version 2.0 contains a complete Linux environment which is bootable from CD or memory stick. It allows using SystemC development environment without installing any software. The SC Live 2.0is about 150 MB and features:

• OSCI SystemC 2.2 beta Simulator
• SystemC Verification Library SCV 1.0
• SystemC Transaction Level Modeling Library TLM 1.0
• SystemC / C++ tutorial (Esperan)
• Compiler gcc g++ 3.4.6
• Debugger gdb 6.3
• Debugger User Interface ddd 3.3.9
• Waveform Viewer gtkwave 1.3.79
• Editor vim 7.0
• Integrated Development Environment geany 0.7.1
• Browser opera 9.02
• Beep Media Player 0.9.7
• PDF Viewer xpdf
• Windows Manager xfce4 4.2.3.2
• Package Management slapt-get 0.9.11b
• Package Management gslapt 0.3.1.2

Esperan also provides User Guide and SystemC tutorial with examples.