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I find it often difficult and time consuming to learn a new tool. I have spent quite a lot of time with Xilinx toolset and this short tutorial might help somebody starting with XIlinx tools. It basically shows how to create a simple project from scratch. I am using the Webpack edition of the ISE 10.1, ISim simulator and Digilent Spartan-3 board.

The example I want to show is quite trivial. It has an AND gate functionality (the output is ‘high’ only when both inputs are ‘high’), plus clock and reset signals. The output is registered and the reset signal is active high. I have used Verilog language to capture design and create testbench.

1. Launch the ISE and click on File -> New Project. Add a project name and choose its location. Choose the HDL type of project.

2. As the project will be implemented on the Digilent Spartan-3 board I have selected the xc3s200 device with ft256 package and -4 speed.

3. Do not add any source and click on ‘next’ button.

4. Do not add any existing sources and click ‘next’.

5. Click on ‘finish’ on the summary window.

6. Click on Project -> New Source to add a source file to the project. Choose the Verilog module and select ‘Add to project’ option.

7. The example has four inputs and one output.

8. Click on ‘finish’ button.

9. The template source file should open and a few lines of code should be added.

10. In the sources panel, click on ‘Sources for:’ option and change it to ‘Behavioural Simulation’.

Click on Project -> New source and select Verilog Test Fixture to create testbench. Select ‘Add to project’ option.

11. Click on ‘next’.

12. Click on ‘finish’.

13. A few lines of code should be added to the created template to provide clock several test conditions.

14. In the ‘processes’ pannel expand ‘Xilinx ISE Simulator’ and double click on ‘Simulate behavioural model’.

As shown on the picture above, the project has an AND gate functionality and behaves as expected, and now it can be implemented into an FPGA on the Digilent Spartan-3 board.

15. To implement a project in the ‘Sources’ panel, the ‘Sources for:’ option should to be changed to ‘Implementation’. Click on Project -> New source and select Implementation Constraints File (.ucf). Give it a name and add to project.

16. Click on ‘finish’.

17. Select the .ucf file and double click on ‘Edit constraints’.

18. As I want to implement the design on the Digilent S3 board, it is necessary to tell the tool which FPGA’s pins should be used for which project’s I/Os. From the boards documentation http://www.digilentinc.com/Data/Products/S3BOARD/S3BOARD_RM.pdf I know that the pins K13 and K14 are connected to slide switches, whereas the P13 pin is connected to the LED. The T19 pin is a clock input and the L14 is a push-button (high when pressed). The .ucf file format is quite simple to edit manually, and it would be quite useful later when using EDK.

19. Save the file and double click on ‘Configure Target Device’ on the ‘processes’ window. As the iMPACT tool is used to configure device the wizard window would pop up.

20. Select JTAG and automatic connection.

21. The iMPACt tool has detected two devices on the boundary scan chain. There is a Spartan-3 device and platform flash on the board. Select the appropriate .bit file to program xc3s200 device.

22. Bypass the second device from the JTAG chain.

23. Leave the default options on the following window.

24. Set the jumpers on the J8 connector on the board to M1 mode and remove jumper from the JP1connector.

25. Right click on the xc3s200 device and click on ‘Program’ button.

26. You should be able to see the ‘Program Succeeded’ message.

27. Now the project can be tested on the board. The slide switches are connected to the inputs A and B. The Z output is connected to the LED, while the push-button is connected to the ‘reset’ input.