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Freescale has introduced the first two members of its new Flexis™ series of microcontrollers (MCUs). The MC9S08QE128 based on the S08 core, and MCF51QE128, based on the ColdFire® V1 core. They are first 8- and 32-bit MCUs with pin-for-pin compatibility and a common set of on-chip peripherals and development tools.

The Flexis series provides the 8- to 32-bit “connection point” on Freescale’s Controller Continuum – the roadmap for compatible 8- and 32-bit architectures. The Flexis QE128 family enables developers to migrate between low-end and high-performance embedded designs with ease and speed.

The code can be developed using new CodeWarrior Development Studio for Microcontrollers 6.0, which provides an array of built-in features and utilities to help developers deliver higher-quality products to market faster. For example, the Processor Expert™ rapid application design tool included in the CodeWarrior tool suite helps simplify the migration process between other Freescale MCUs.

Flexis QE128 product features:

MC9S08QE128: first 8-bit S08 MCU with up to 128 KB flash memory
MCF51QE128: first 32-bit ColdFire V1 MCU and industry’s most power-efficient 32-bit controller
Stop currents down to 370 nA
6 microsecond wakeup time
Ultra-low run currents starting at 50 micro-amps.
50MHz S08 or ColdFire V1 core operating frequency
25MHz bus frequency
Up to 8K bytes RAM
Up to 128 KB flash
24-channel, 12-bit ADC
Two analog comparators
2x SCI, 2x I2C, 2x SPI
One 6-channel and two 3-channel timer PWM modules
Real-time clock (RTC)
Up to 70 general-purpose I/O (GPIO)
System integration: frequency locked loop (FLL) and software watchdog
Internal clock source (ICS)
Low-power external 32 kHz oscillator
1.8V – 3.6V operating range
Enhanced internal oscillator, voltage regulator and real-time counter
Packages: 80LQFP, 64LQFP
Temperature Range: -40oC to 85oC
Common development tools including CodeWarrior for Microcontrollers 6.0

More details at Freescale website.

Few months ago Cypress Semiconductor introduced new CapSense Demo Board based on their PSoC microcontrollers. Basic idea is to replace mechanical components like buttons, sliders and touchpads with more economical and reliable parts. Although it is probably more reliable than mechanical switches, the economical issues are not so obvious.

CapSense technology is based on buttons and sliders made directly on PCBs. Sensing elements are built with traces and gaps between them. Application note AN2292 gives PCB layout guidelines. The AN2233a application note outlines theory, design techniques and implementation with PSoC microcontrollers. In the AN2277 is described the Capacitive Front Panel Display demonstration board, its layout, firmware, and features.

Texas Instruments recently released an application report SLA363 “PCB-Based Capacitive Touch Sensing With MSP430″. In this application report, the design of a capacitive touch sensor interface using the MSP430 microcontroller is dicussed. This application report provides an overview of the technology, and details for different methodologies of capacitive touch sensing implementations using the MSP430 family. Main idea is rather similar to that explained in the Cypress app notes.

Analog Devices released new application note with a detailed description of interfacing the HD44780-Based Character LCD to an ADuC702x devices. This application note describes the commands to control the basic functions of the LCD.

The data bus that connects the HD44780 to the MicroConveter® can be 8 or 4 bits wide; in this application note, only the case of an 8-bit data bus is examined. In addition to the data bus, three control lines are required; thus, a total of 11 pins are required to interface the LCD to the MicroConverter.

In the app note basic functions are explained:

• CONFIGURING THE LCD SCREEN
• CLEARING THE LCD SCREEN
• SETTING THE ENTRY MODE
• WRITING TEXT TO THE LCD SCREEN

Full application note and related source code is available at Analog Devices website.

New Actel application note “Adding Custom Peripherals to the AMBA Host and Peripheral Buses” gives the overview of customizing Actel’s CoreMP7 microprocessor. It shows how to create CoreMP7 design within CoreConsole.

The Actel CoreMP7 microprocessor is a soft-core implementation of the industry-standard ARM7TDMI-S™ and is optimized for maximum speed and minimum size in Actel flash-based FPGAs.

The CoreConsole IP Deployment Platform tool is a standalone microprocessor system builder that allows the designer to choose from among CoreMP7 variants, along with the peripherals c

onnected to the AHB and APB interfaces. Once the CoreConsole design has been imported into Libero IDE, the remaining unused logic can be utilized for implementing additional processor peripherals and other desired digital functions.

The system constructed in the example from the app note, is comprised of the following components:
• CoreMP7/CoreMP7Bridge – ARM7TDMI-S/ARM native bus to AHB master
• CoreAHBLite – Single master AMBA High-performance bus interface
• CoreMemCtrl – Memory controller (AHB peripheral)
• CoreAHB2APB – AHB-to-APB bridge (AHB slave, APB master peripheral)
• CoreAPB – AMBA peripheral bus interface
• CoreGPIO – General purpose I/O interface (APB peripheral)
• CoreUARTapb – Universal Asynchronous Receiver Transmitter interface (APB peripheral)

Full description of the customization process, examples and simulation overview at Actel’s website.

The STMPE801 and STMPE2401 are simple solution to system expansion. ST has introduced the new Xpander Logic family to help overcome the limited number of Input/Output (I/O) ports in the microcontroller and microprocessor based embedded systems. Any existing or additional intensive tasks on the central processing unit (CPU) can be reassigned to the Xpander Logic IC at ultra-low power consumption and in very small packages (QFN16 and µTFBGA36).

Xpander Logic allows the existing system processor to use a wide range of intelligent functions through a standard and high-speed Inter-Integrated Circuit (I2C) serial peripheral interface. All these features are achieved through a minimum change on the existing microprocessor or microcontroller’s firmware. This results in a very flexible, cost-competitive solution to expand the system’s resources compared to the complex implementation of a larger and more expensive CPU or CPLD in the embedded system. A further benefit of the Xpander Logic family is the high optimization for micro-power operation and the advanced power management support that helps modern portable systems preserve and extend battery life.

Application areas:

• QWERTY keypads
• Mobile phones, smart phones, IP phones
• Multifunction printers
• Portable multimedia devices
• Industrial automation

More details at producer’s website: STMPE801 and STMPE2401.

The MAX109, 2.2Gsps, 8-bit, analog-to-digital converter (ADC) enables the accurate digitizing up to 2.5GHz. Fabricated on an advanced SiGe process, the MAX109 integrates a high-performance track/hold (T/H) amplifier, a quantizer, and a 1:4 demultiplexer on a single monolithic die. The MAX109 also features adjustable offset, full-scale voltage (via REFIN), and sampling instance allowing multiple ADCs to be interleaved in time.

The innovative design of the internal T/H amplifier, which has a wide 2.8GHz full-power bandwidth, enables a flat-frequency response through the second Nyquist region.

The analog input is designed for both differential and single-ended use with a 500mVP-P input-voltage range. The output data is in standard LVDS format, and is demultiplexed by an internal 1:4 demultiplexer. The LVDS outputs operate from a supply-voltage range of 3V to 3.6V for compatibility with single 3V-reference systems. Interfaces directly to common FPGAs with DDR and QDR modes. Control inputs are provided for interleaving additional MAX109 devices to increase the effective system-sampling rate.

The MAX109 is offered in a 256-pin Super Ball-Grid Array (SBGA) package.

More details in MAX109 datasheet.