Renesas plans to develop a next-generation CPU architecture for 16- and 32-bit microcontrollers.
Renesas Technology informed about plans to develop a next-generation CPU architecture for 16- and 32-bit microcontrollers. The new architecture will offer revolutionary enhancements over existing 16- and 32-bit CISC CPUs and is expected to achieve the best overall performance: the best code efficiency, processing performance, power consumption, and cost competitiveness. Products based on the new CPU core will be available in Q2 2009.
The new CPUs will combine high code efficiency of the M16C and R32C CISC CPUs and the high-speed data processing capability of the H8S and H8SX CISC CPUs. While maintaining compatibility with the existing CPUs, the new products will offer stronger performance, better code efficiency and lower power consumption.
New CPU will be possitioned on the architecture roadmap somewhere between R8C Tiny and Super H microcontroller families.